| Diameter | 4"
| 5"
| 6"
| 8"
|
Epitaxy-Layer | Dopant | Boron, Phos, Arsenic |
| Orientation | <100>, <111> |
| Type | P/P++, N/N++, N/N+, N/N+/N++, N/P/P, P/N/N+ |
| Resistivity | 0.001-1000 Ohm-cm |
| Res. Uniformity | Standard <6%, Maximum Capabilities <2% |
| Thickness(um) | 1.5-150 |
| Thickness Uniformity | Standard <3%, Maximum Capabilities <1% |
Substrate | Orientation | <100>, <111> |
| Type/Dopant | P Type/Boron , N Type/Phos, N Type/As, N Type/Sb |
| Thickness (um) | 300-725 |
| Resistivity | 0.001-100 Ohm-cm |
| Surface Finished | P/P, P/E |
| Particle | <30@.0.5um |
With the device feature's size miniaturization in very large scale integrated circuit and ultra large-scale integrated circuit towards the sub-micron and beyond level, the next generation of IC device requires silicon wafers with more improved electrical characteristics and reliability as well as a high perfection of the wafer surface. Compared with the polished wafer with a relatively high density of crystal originated defects (e.g. COPs), silicon epiwafers can meet such high requirements. The material parameters of epiwafers, such as epidefects, uniformity of thickness and resistivity, transition width, and minority carrier generation lifetime for epilayer were characterized in detail.
